Optimization of CNFET Parameters for High Performance Digital Circuits

Performance Optimization of CNFET-based Domino Logic circuits

-For many years VLSI Chip designers have been using Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). As the channel length of device is reducing, effects like parametric variations and increase in leakage current have caused V-I characteristics to deviate from those of traditional MOSFETs. Hence the development of devices at deep submicron retards to some extent. Carbon Nanotube Fi...

Power - Performance Optimization for Custom Digital Circuits

This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to maximize the performance of digital circuits within a limited power budget by tuning various variables such as gate sizes, supply, and threshold voltages. It can employ different models to characterize the components. Anal...

High Performance CNFET-based Ternary Full Adders

This paper investigates the use of carbon nanotube field effect transistors (CNFETs) for the design of ternary full adder cells. The proposed circuits have been designed based on the unique properties of CNFETs such as having desired threshold voltages by adjusting diameter of the CNFETs gate nanotubes. The proposed circuits are examined using HSPICE simulator with the standard 32 nm CNFET tech...

Static Simulation of CNTFET-based Digital Circuits

   In this paper we implement a simple DC model for CNTFETs already proposed by us in order to carry out static analysis of basic digital circuits. To verify the validity of the obtained results, they are compared with those of Wong model, resulting in good agreement, but obtaining a lighter ensuring compile and shorter execution time, which are the main character...

Energy-Performance Optimization of Synthesized Digital Integrated Circuits